As complementary metal oxide semiconductor (CMOS) devices are scaled to smaller sizes for future technologies, new materials and concepts are necessary to meet the advanced performance requirements.
CMOS technology includes N-type metal oxide semiconductor (NMOS) and P-type metal oxide semiconductor (PMOS). For example, a metal-oxide-semiconductor field-effect transistor (MOSFET) is a transistor used for amplifying or switching electronic signals. One aspect of high performance in NMOS and PMOS and various other devices is device switching frequency. For devices to operate at high frequencies, it is necessary to have a low resistance, including a low contact resistance between metal interconnect structures and the channel of the NMOS and PMOS transistors. Contact is made to the gate electrodes, as well as to both the source and drain regions, of the associated transistors.
III-V compound semiconductors are potential channel materials for future CMOS devices because of their high mobility and low carrier effective mass. One challenge is to reduce resistance in the source/drain (S/D) extensions to maximize the performance of the associated transistors in III-V semiconductor CMOS technology.